Portable communication devices, such as cellular telephones, personal digital assistants (PDAs), WiFi transceivers, and other communication devices transmit and receive communication signal at various frequencies that correspond to different communication bands and at varying power levels. Each of these devices uses a power amplifier to amplify the information signal for over-the-air transmission. One such power amplifier topology is referred to a collector voltage amplitude controller (COVAC). One technology used to implement a COVAC power amplifier uses one or more bipolar junction transistor (BJT) or heterojunction bipolar transistor (HBT) stages to implement the power amplifier, while the supply voltage is provided to the collector of the power amplifier using control circuitry that can be fabricated using a complementary metal oxide semiconductor (CMOS) process. In an implementation, the collector of a COVAC power amplifier is connected through an inductor (a radio frequency (RF) choke) to the drain of a p-type field effect transistor (PFET) which is controlled by an external control voltage, Vapc, applied to a comparator. The comparator also receives a power feedback signal, Vfb, and the resulting output of the comparator is applied to the gate of the PFET.
When used in a voltage regulator, the PFET is sometimes referred to as a “pass” transistor. The comparator and the pass transistor form a voltage regulator that provides a regulated voltage, Vreg, at the drain of the PFET. The source of the PFET is connected to a supply voltage (often the DC power source (e.g., the battery) of the portable communication device) and the comparator output applied to the gate influences the amount current that flows from the source to the drain of the PFET, thereby controlling the power output of the COVAC power amplifier.
The output, Vreg, of the voltage regulator increases linearly with the external control voltage, Vapc, regardless of power amplifier load conditions. As the battery voltage drops, the drain to source voltage, Vds, of the PFET transistor is reduced. When Vds of the PFET is reduced below its minimum saturation level, the PFET is pushed into triode operating mode and the voltage regulator might no longer be able to supply the voltage needed for the desired output power. Furthermore, when the PFET is in the triode mode, Vreg can no longer be controlled and the regulator has become “saturated”. Since output power is directly controlled by the regulated voltage, Vreg, once the voltage regulator goes into saturation, power spectrum is degraded and large switching transients are generated. These switching transients can violate time mask and switching transient requirements.
A previous solution to prevent voltage saturation for a COVAC power amplifier entailed applying a clamp voltage to a third input of the comparator. The clamp voltage is relatively easy to determine because a fixed relationship exists between the regulated voltage and a power control signal. However, there are other implementations of a COVAC power amplifier where the ratio between the regulated voltage and the power control signal can vary with power amplifier load, thus making it difficult to calculate an equivalent power control signal value to prevent the regulated voltage from exceeding a set threshold.
Therefore, there is a need for voltage saturation protection in an implementation of a COVAC power amplifier where the ratio between the regulated voltage and the power control signal can vary with power amplifier load.